首页 / 操作系统 / Linux / u-boot-2011.06在基于s3c2440开发板的移植之支持NandFlash读写

在“NorFlash启动”一文中，我们把drivers/mtd/nand/s3c2410_nand.c文件复制为s3c2440_nand.c文件，并把该文件内的所有有关“2410”的地方一律改为“2440”。这么修改仅仅是能够让系统编译成功，并没有真正实现NandFlash的读写。在这里，我们就来介绍如何让u-boot支持NandFlash的读写。相关阅读：U-Boot源代码下载地址 http://www.linuxidc.com/Linux/2011-07/38897.htmU-Boot-2011.06启动流程分析 http://www.linuxidc.com/Linux/2011-07/39310.htmu-boot-2011.06在基于s3c2440开发板的移植之编译配置 http://www.linuxidc.com/Linux/2011-10/45455.htmu-boot-2011.06在基于s3c2440开发板的移植之NorFlash启动 http://www.linuxidc.com/Linux/2011-10/45456.htmu-boot-2011.06在基于S3C2440开发板的移植之解决raise: Signal # 8 caught http://www.linuxidc.com/Linux/2011-10/454554.htmu-boot-2011.06在基于s3c2440开发板的移植之支持NandFlash读写 http://www.linuxidc.com/Linux/2011-10/45457.htmu-boot-2011.06在基于s3c2440开发板的移植之硬件ECC http://www.linuxidc.com/Linux/2011-10/454558.htm由于s3c2410与s3c2440的NandFlash控制器不一样，因此s3c2440_nand.c文件并不能直接应用，需要进行适当的修改，而主要修改的内容就是s3c2440的相关寄存器。首先重新定义要用到的寄存器，把原文中第27行至第37行之间的宏定义去掉，改为下面的形式：#define S3C2440_NFCONT_SECCL       （1<<6）#define S3C2440_NFCONT_MECCL       （1<<5）#define S3C2440_NFCONT_INITECC     （1<<4）#define S3C2440_NFCONT_nCE         （1<<1）#define S3C2440_NFCONT_MODE        （1<<0）#define S3C2440_NFCONF_TACLS（x）    （（x）<<12）#define S3C2440_NFCONF_TWRPH0（x）   （（x）<<8）#define S3C2440_NFCONF_TWRPH1（x）   （（x）<<4） #define S3C2440_ADDR_NALE        0x08#define S3C2440_ADDR_NCLE       0x0C 然后就是修改s3c2440_hwcontrol函数和board_nand_init函数，其他函数不变。 board_nand_init函数主要是用于对NandFlash的初始化，对它修改的内容是对寄存器NFCONF和寄存器NFCONT的修改，如下所示为修改后的board_nand_init函数，其中红色标注的地方为修改的地方：int   board_nand_init（struct nand_chip *nand）{       u_int32_t cfg;       u_int8_t tacls, twrph0, twrph1;       struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power（）;       struct s3c2440_nand *nand_reg = s3c2440_get_base_nand（）;        debugX（1,"board_nand_init（） "）;        writel（readl（&clk_power->clkcon） |（1 << 4）, &clk_power->clkcon）;        /* initialize hardware */#ifdefined（CONFIG_S3C24XX_CUSTOM_NAND_TIMING）       tacls = CONFIG_S3C24XX_TACLS;       twrph0 = CONFIG_S3C24XX_TWRPH0;       twrph1 = CONFIG_S3C24XX_TWRPH1;#else       tacls = 2;       twrph0 = 3;       twrph1 = 1;#endif        cfg = S3C2440_NFCONF_TACLS（tacls - 1）;       cfg |= S3C2440_NFCONF_TWRPH0（twrph0 - 1）;       cfg |= S3C2440_NFCONF_TWRPH1（twrph1 - 1）;       writel（cfg,&nand_reg->nfconf）;              cfg = S3C2440_NFCONT_SECCL;       cfg |= S3C2440_NFCONT_MECCL;       cfg |= S3C2440_NFCONT_MODE;       writel（cfg,&nand_reg->nfcont）;        /* initialize nand_chip data structure */       nand->IO_ADDR_R = （void*）&nand_reg->nfdata;       nand->IO_ADDR_W = （void*）&nand_reg->nfdata;        nand->select_chip = NULL;        /* read_buf and write_buf are default */       /* read_byte and write_byte are default*/#ifdefCONFIG_NAND_SPL       nand->read_buf = nand_read_buf;#endif        /* hwcontrol always must be implemented*/       nand->cmd_ctrl = s3c2440_hwcontrol;        nand->dev_ready = s3c2440_dev_ready; #ifdefCONFIG_S3C2440_NAND_HWECC       nand->ecc.hwctl = s3c2440_nand_enable_hwecc;       nand->ecc.calculate = s3c2440_nand_calculate_ecc;       nand->ecc.correct = s3c2440_nand_correct_data;       nand->ecc.mode = NAND_ECC_HW;       nand->ecc.size =CONFIG_SYS_NAND_ECCSIZE;       nand->ecc.bytes =CONFIG_SYS_NAND_ECCBYTES;#else       nand->ecc.mode = NAND_ECC_SOFT;#endif #ifdef CONFIG_S3C2440_NAND_BBT       nand->options = NAND_USE_FLASH_BBT;#else       nand->options = 0;#endif        debugX（1, "end ofnand_init "）;        return 0;}